IBM Systems Magazine, Mainframe Edition - November/December 2012 - (Page 30)

Tech Corner Programming, systems operations and more Built for Speed and Performance From silicon to architecture, zEC12 innovations push the envelope By C. Kevin Shum and Charles Webb T he IBM mainframe has long been the platform of choice for enterprise computing. With IBM System z* leadership, its virtualization and workloadmanagement capabilities deliver the highest level of operational efficiency and system utilization. EC12 (zEC12) was developed to extend its base features, adding more innovations to yield an even better platform for critical information systems. The key to extending zEnterprise leadership performance lies in leveraging the scalability of various technologies to keep up with the growing scale and scope of enterprise computing workloads. For the zEC12, these scaling factors include more: Transistors per chip Instructions processed in parallel from the processor pipeline design Processors per book, multichip modules and cooling technologies Efficient software scaling to utilize those processors, aided by extensions to the z/Architecture* instruction set In addition, it’s considered a highly secure and reliable machine. Each generation incorporates the latest innovations from a talented pool of researchers, architects, software programmers and hardware engineers, utilizing the full range of IBM technology, from silicon chips to multisystem ensembles. When announced in 2010, the zEnterprise* System processor core not only ran at 5.2 GHz—the world’s fastest at the time—but also included an impressive list of innovations. A new, out-of-order instruction-processing pipeline was implemented to allow overlapping instruction executions and cache misses, thus speeding up applications. A new on-chip cache hierarchy also reduced effective memory access time, further benefiting memoryintensive applications. New instructions enabled compilers to generate more efficient code for applications and middleware. As the successor to the zEnterprise 196 (z196), the zEnterprise Technology Usages Basic enablements for hardware improvements start with chipmaking. IBM’s 32nm silicon-on-insulator (SOI) 22 30 NOVEMBER/DECEMBER 2012

Table of Contents for the Digital Edition of IBM Systems Magazine, Mainframe Edition - November/December 2012

IBM Systems Magazine, Mainframe Edition - November/December 2012
Table of Contents
Editor's Desk: Been There, Done That
IBM Perspective: Not All Clouds Are Designed Equal
Insider: What's Really Driving Peak CPU Usage?
Focus on Storage: The DS8870 Provides up to Three Times the Performance of Its Predecessor
Case Study: A Capital Investment: DTCC implements tools to ensure its networking infrastructure is ready for anything
Cover Story: A Clear Vision for Cloud: System z GM Doug Balog on why zEnterprise provides a firm foundation for a secure cloud
Feature: Overcoming Cloud Obstacles: The benefits far outweigh the challenges associated with cloud integration
Tech Corner: From Silicon to Architecture, zEC12 Innovations Push the Envelope
Administrator: IBM zAware Extends z/OS Resilience to Another Level
Solutions: Attach Facility; DataSniff; AutoPilot; Eclipse; Correlog Enterprise Server 5.1
Advertisers Index
Stop Run: IBM Distinguished Engineer Joe Temple Reflects on His Juggling Past
Reference Point - Global Events, Education, Resources for Power Systems
Smarter Computing
2013 Mainframe Buyer's Guide Index

IBM Systems Magazine, Mainframe Edition - November/December 2012